A major academic conference in China's radar field — the 3rd Radar Frontier Academic Conference — is about to open grandly at the Century Golden Resources Hotel Changsha! Dayao Information Technology (Hunan) Co., Ltd. (Dayao Technology), as an exhibitor at this conference, will showcase its full suite of domestically developed radar simulation, RF hardware, and teaching & training core products. We sincerely invite academicians, experts, university researchers, and technical professionals from research institutes across China to visit our booth for exchanges and discussions on cutting-edge technologies and deep industry-university-research collaboration.

The 64th Higher Education Expo was grandly held and successfully concluded at the Nanchang Greenland International Expo Center. Themed 'Empowerment, Collaboration, and Excellence: Supporting the Construction of a Strong Higher Education Nation,' this edition gathered over 1,500 universities and more than 6,000 enterprises, focusing on the deep integration of emerging technologies with educational scenarios to jointly chart a new blueprint for innovative development in higher education.

To deepen the integration of industry and education and promote collaborative talent cultivation between universities and enterprises, and to advance employment work for the graduating class of 2026, on May 18, Wei Xiaolin, Deputy Party Secretary and President of Hengyang Normal University, led a delegation to visit and exchange with Dayao Information Technology (Hunan) Co., Ltd. The Party and administrative leadership of the School of Computer Science and Technology, along with the head of the School of Physics and Electronic Engineering, accompanied the inspection. Xi Yong, founder and general manager of the company, led the core team in warmly receiving the delegation, accompanying them throughout the visit, and holding a symposium with the university delegation.

May 15, 2026, marked the grand opening of the commemorative event for the “World Telecommunication and Information Society Day (WTISD) on May 17” and China Unicom’s Hunan Science & Technology Innovation Conference at China Unicom’s Central-South Research Institute. Dayao Information Technology (Hunan) Co., Ltd. (“Dayao Technology”), as a key participant, was invited to attend. Representatives from government regulatory authorities, universities and research institutes, industry ecosystem partners, and various China Unicom units gathered to jointly explore emerging trends in the digital communications industry, deliberate new pathways for digital and intelligent transformation, and chart a new blueprint for integrated technological innovation.

The electromagnetic spectrum has become a critical nexus for multi-domain joint operations. Under intelligent warfare, traditional electromagnetic combat paradigms face bottlenecks in sensing, decision-making, and resource scheduling. The Digital Parallel Battlefield leverages digital twin and AI technologies to construct a high-fidelity digital mirror of the electromagnetic domain, establishing a bidirectional virtual-physical closed-loop system that reshapes electromagnetic warfare paradigms. Integrated with Dayao Technology’s domestically developed product suite — Tianwen–Tiangang–Tianyu — it enables high-fidelity electromagnetic environment replication, large-scale parallel simulation, and iterative virtual-physical optimization. This advances electronic warfare from single-platform competition toward systemic博弈, delivering autonomous, controllable technical support for low-altitude defense, wireless communications, and scientific research & training.

Traditional large-scale radio instruments are constrained by size and deployment scenarios, making field operations cumbersome. This article introduces Dayao Technology's Tianyu series RF320 portable Software-Defined Radio (SDR) device. With dimensions of only 180×130×39 mm and a weight under 0.5 kg, the RF320 balances compact portability with high performance. It supports an ultra-wide frequency range of 1 MHz–18 GHz and an instantaneous bandwidth of 56 MHz. Equipped with 12-bit ADC/DAC, it enables weak-signal acquisition. The device is compatible with the GNU Radio open-source ecosystem and integrates the proprietary Tiangong core engine. It is suitable for diverse applications including university teaching, research prototyping, field spectrum monitoring, and development by radio enthusiasts. Additionally, this article compares the RF320 with other models in the Tianyu series to assist readers in rapid model selection.

The explosion of battlefield sensors has led to data overload. The U.S. military's CJADC2 initiative deploys AI to the tactical edge, enabling intelligent RF signal processing locally—filtering massive volumes of raw sampled data—to achieve rapid threat identification in bandwidth-constrained environments. This reveals that the core of modern spectrum warfare has shifted toward edge-distributed intelligence.

Software-Defined Radio (SDR) is a core foundational platform in communications, radar, and electronic warfare. For years, the domestic market has heavily relied on overseas equipment, suffering from technological restrictions, poor compatibility, and high costs. After years of technical accumulation and iterative breakthroughs, Dayao Technology’s domestically developed RF-series universal SDR hardware—featuring full-stack in-house R&D, high performance, and superior compatibility—has become the preferred domestic alternative for university research and national defense equipment.

在硬件博览会上，爱丽丝对比了四款典型软件无线电设备。RTL‑SDR 仅作为信号采集的 “耳朵”，依靠电脑 CPU 完成全部信号处理；HackRF One 搭载简化版 CPLD 辅助数据流调度；USRP 依靠板载 FPGA 承担 DDC/DUC 数字变频的繁重工作；Zynq 则将 FPGA 与 ARM CPU 集成单芯片，脱离电脑独立运行。本章通过不同价位 SDR 平台的对比，解释 FPGA、DSP、CPU 在系统中的分工关系，读懂软件无线电 “职责不变，载体可变” 的核心思想。

In this chapter, Alice visits a digital frequency conversion factory governed by an FPGA, where she learns about DDC (Digital Down Conversion) and DUC (Digital Up Conversion). DDC handles down-conversion and decimation of high-frequency signals during reception, while DUC performs up-conversion and interpolation of baseband signals during transmission—these two processes are inverse operations of each other. We will dissect the roles of mixing, filtering, decimation, and interpolation, clarify where digital frequency conversion resides in the SDR signal chain, and understand the distinct responsibilities of the FPGA, DSP, and CPU.

After mapping out the complete physical signal flow chain of Software-Defined Radio (SDR), this chapter invites Alice onto a dedicated SDR stage—theater—using the whimsical fairy-tale metaphor of 'Three Brothers Performing Together' to thoroughly deconstruct the three core computational architectures in the SDR digital domain: FPGA, DSP, and CPU. The article clearly delineates the functional division of labor and collaboration logic among them: the FPGA handles high-speed parallel signal processing—the 'heavy lifting'—including Digital Down Conversion (DDC), Digital Up Conversion (DUC), and massive data stream processing; the DSP specializes in precise signal computations—such as modulation/demodulation and iterative algorithm execution—the 'fine work' of baseband processing; and the CPU acts as the system-wide orchestrator, managing device configuration, task scheduling, and human–machine interaction. It also addresses a key question many readers have: modern SDR devices do not necessarily include a discrete DSP chip—advancing technology enables FPGA hard cores or CPU software to assume traditional DSP computational responsibilities. This chapter breaks down rigid hardware stereotypes, emphasizing that while implementation platforms may vary, core functional divisions remain constant—a fundamental engineering principle. It fully elucidates the operational essence of SDR heterogeneous computing and lays a solid foundation for subsequent in-depth study of FPGA-based digital frequency conversion principles.

Building upon the core concepts of Software-Defined Radio (SDR) introduced in the previous chapter, this chapter follows Alice into a luminous corridor adorned with signal schematics, comprehensively deconstructing the entire physical and signal architecture of SDR. Using a fairy-tale narrative, the article systematically dissects the 'skeletal framework' of SDR: beginning with the complete bidirectional signal flow chain, it explains in accessible terms the three fundamental functions of the RF front-end—amplification, filtering, and frequency conversion. It provides an in-depth comparison of the classical superheterodyne architecture versus the modern zero-IF architecture, highlighting their respective advantages, drawbacks, and application scenarios. The chapter also introduces mainstream domestic and international RF integrated chips—including the AD9361 and LMS7002M—and reveals the evolutionary breakthrough enabling modern SDR to transition from bulky hardware circuits to single-chip programmability. Furthermore, it clearly articulates the critical role of the ADC (analog-to-digital converter), emphasizing how sampling rate and resolution decisively impact device performance, and outlines the mirrored signal processing logic between receiver and transmitter chains. Ultimately, this chapter fully resolves the central question: 'Why is the ideal SDR difficult to realize in practice, and how is real-world SDR engineered?' It bridges the gap from software theory to hardware implementation, laying the essential groundwork for subsequent discussions on digital signal processing and the three core processors.